1. Field of the Invention
This invention generally relates to an integrated circuit wafer and an integrated circuit die.
2. Description of the Prior Art
A wafer is a substrate for manufacturing integrated circuits. Using integrated circuits fabrication technology, through a series of complicated chemical, physical, and optical processes, a fabricated integrated circuit wafer can include thousands of integrated circuit dice. After being tested, cut, and packaged, the dice can be formed into various integrated circuit products having different functions.
As shown in FIGS. 1A and 1B which shows a cross sectional view of area 80 of FIG. 1A indicated by PP, the conventional integrated circuit wafer 90 includes a wafer substrate 100, a plurality of integrated circuits 300, a plurality of test-keys 400, and an isolation film 500. In a conventional wafer dicing process, an external force K is applied to the integrated circuit wafer 90 along a path between two adjacent integrated circuits 300 by a cutter. Because the cutter is directly applied onto the integrated circuit wafer 90, cracks and damages of the integrated circuit wafer 90 will be produced by the dicing stress. On the other hand, the test-keys 400 are distributed between the integrated circuits 300, i.e. on the dicing path. Therefore, the yield rate will be decreased due to metal ashes generated from cutting the test-key during the dicing process. Therefore, it is desired to improve the conventional integrated circuit wafer and the dicing method thereof.